DocumentCode :
3366859
Title :
A Low Power V-band Low Noise Amplifier Using 0.13-μm CMOS Technology
Author :
Wu, Chung-Yu ; Chen, Po-Hung
Author_Institution :
Nat. Chiao Tung Univ., Hsinchu
fYear :
2007
fDate :
11-14 Dec. 2007
Firstpage :
1328
Lastpage :
1331
Abstract :
In this paper, a low power V-band low-noise amplifier (LNA) using standard 0.13-um CMOS technology is proposed and analyzed. In the proposed LNA, three-stage common-source topology is used instead of cascode configuration to improve the noise performance. The measured LNA gain is 10.9 dB and the simulated noise figure of the proposed LNA is 5.1 dB at 67.8 GHz. Furthermore, the input and output return losses are lower than -12 dB at center frequency. Moreover, the 3-dB bandwidth covers from 65 GHz to 72 GHz which is suitable for wideband applications. Finally, the proposed LNA consumes only 5.4 mW from a 0.8-V power supply.
Keywords :
CMOS integrated circuits; low noise amplifiers; low-power electronics; millimetre wave amplifiers; CMOS technology; LNA; frequency 65 GHz to 72 GHz; gain 10.9 dB; gain 5.1 dB; low power v-band low noise amplifier; noise figure; power 5.4 mW; return losses; size 0.13 mum; three-stage common-source topology; voltage 0.8 V; Bandwidth; CMOS technology; Frequency; Gain measurement; Low-noise amplifiers; Noise figure; Noise measurement; Power supplies; Topology; Wideband;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics, Circuits and Systems, 2007. ICECS 2007. 14th IEEE International Conference on
Conference_Location :
Marrakech
Print_ISBN :
978-1-4244-1377-5
Electronic_ISBN :
978-1-4244-1378-2
Type :
conf
DOI :
10.1109/ICECS.2007.4511243
Filename :
4511243
Link To Document :
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