Title :
An analog perspective on device reliability in 32nm high-κ metal gate technology
Author :
Chouard, Florian Raoul ; More, Shailesh ; Fulde, Michael ; Schmitt-Landsiedel, Doris
Author_Institution :
Lehrstuhl fur Tech. Elektron., Tech. Univ. Munchen, München, Germany
Abstract :
An assessment on analog circuit reliability for an advanced 32nm high-κ metal gate technology is given from the analog designer´s point of view. Selected analog circuit blocks are investigated with respect to device stress states. A custom test structure, designed to reveal analog related device characteristics including relaxation effects, was used to perform stress measurements. In addition to common aging in inversion mode, degradation in accumulation mode is determined. Experiments reveal that relaxation shows a large variety in drift behavior, and degradation induced variations - even for analog size devices - can reach significant values. Both topics are main issues for analog circuits design. Thereupon a general approach to consider device aging for analog circuit reliability is proposed.
Keywords :
ageing; analogue circuits; circuit reliability; differential amplifiers; high-k dielectric thin films; voltage-controlled oscillators; accumulation mode; analog circuit blocks; analog circuit reliability; analog perspective; custom test structure; device aging; device reliability; device stress states; high-κ metal gate technology; inversion mode; relaxation effects; size 32 nm; Aging; Analog circuits; Annealing; Degradation; MOS devices; Stress; Transistors; NBTI; PBTI; aging; analog; circuit reliability; degradation;
Conference_Titel :
Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2011 IEEE 14th International Symposium on
Conference_Location :
Cottbus
Print_ISBN :
978-1-4244-9755-3
DOI :
10.1109/DDECS.2011.5783049
