DocumentCode
3367343
Title
Decoupling capacitance boosting for on-chip resonant supply noise reduction
Author
Kim, Jinmyoung ; Nakura, Toru ; Takata, Hidehiro ; Ishibashi, Koichiro ; Ikeda, Makoto ; Asada, Kunihiro
Author_Institution
Dept. of Electr. Eng. & Inf. Syst., Univ. of Tokyo, Tokyo, Japan
fYear
2011
fDate
13-15 April 2011
Firstpage
111
Lastpage
114
Abstract
This paper presents a decoupling capacitance boosting method for on-chip resonant supply noise reduction for DVS systems. The switching controls of decoupling capacitors depending on the supply noise states achieve an effective noise reduction and fast settling time simultaneously compared with the conventional passive decoupling capacitors. The measurement results of a test chip fabricated in a 0.18 μm CMOS technology show 12X boost of effective decap value, and 65.8% supply noise reduction with 96% settling time improvement.
Keywords
CMOS integrated circuits; capacitors; integrated circuit design; integrated circuit noise; CMOS technology; decoupling capacitance boosting; dynamic voltage scaling; effective noise reduction; on-chip resonant supply noise reduction; size 0.18 mum; switching controls; Boosting; Capacitance; Foot; Noise; Noise reduction; System-on-a-chip; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2011 IEEE 14th International Symposium on
Conference_Location
Cottbus
Print_ISBN
978-1-4244-9755-3
Type
conf
DOI
10.1109/DDECS.2011.5783058
Filename
5783058
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