A new cryptographic system and its VLSI implementation

Author

Yen, Jui-Cheng ; Chen, Hun-Chen ; Jou, Shin-Shian

Author_Institution

Dept. of Electron. Eng., Nat. United Univ., Miaoli, Taiwan

Volume

2

fYear

2004

fDate

23-26 May 2004

Abstract

Nowadays, there are many cryptographic applications that demand high security, high speed, and low hardware cost. In order to meet the requirements, we propose a new cryptographic system. Under the control of an unpredictable binary sequence generated from 1D Logistic map, every 7 bytes of input data are 1) expanded to 8 bytes, ii) randomly swapped in three level, 3) randomly XORed or XNORed to two random keys Seed1 or Seed2, and 4) bit-recirculated in random direction and random number of bits. It is analyzed to be high security. In order to implement the system, a unified architecture with 5 stages pipeline for the system has been designed, verified, and physically realized based on a 0.35 μm CMOS technology. Finally, the implementation result is compared with some existing designs.

Keywords

CMOS digital integrated circuits; VLSI; binary sequences; cryptography; integrated circuit design; 0.35 micron; 1D logistic map; CMOS technology; VLSI implementation; binary sequence; bit recirculation; cryptographic system; high security; low hardware cost; Binary sequences; CMOS technology; Costs; Cryptography; Data security; Hardware; Logistics; Pipelines; Random number generation; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on

Print_ISBN

0-7803-8251-X

Type

conf

DOI

10.1109/ISCAS.2004.1329248

Filename

1329248