DocumentCode
3368061
Title
A memetic algorithm for computing 3D capacitance in multiconductor VLSI circuits
Author
Bontzios, Yiorgos I. ; Dimopoulos, Michael G. ; Hatzopoulos, Alkis A.
Author_Institution
Dept. of Electr. & Comput. Eng., Aristotle Univ. of Thessaloniki, Thessaloniki, Greece
fYear
2011
fDate
13-15 April 2011
Firstpage
341
Lastpage
346
Abstract
A memetic algorithm for computing the capacitance coupling in Very Large Scale Integrated (VLSI) circuits is presented in this work. The method is based on an approximate extended version of the method of images, is general and applicable to an arbitrary geometry and configuration of conductors. Simulation results are presented for several practical case studies where our method is compared with a commercial tool employing the Finite Element Method (FEM). The capacitance value computed by the proposed method is shown to be in close agreement with the value obtained by the commercial tool with the average difference kept below 3%, thus revealing the efficiency of the proposed scheme.
Keywords
VLSI; evolutionary computation; finite element analysis; 3D capacitance computing; FEM; finite element method; memetic algorithm; multiconductor VLSI circuits; multiconductor very large scale integrated circuits; Capacitance; Conductors; Couplings; Finite element methods; Geometry; Memetics; Three dimensional displays; Capacitance; Capacitance Modeling; Memetic Algorithm; Method of Images; Point Charges; VLSI circuits;
fLanguage
English
Publisher
ieee
Conference_Titel
Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2011 IEEE 14th International Symposium on
Conference_Location
Cottbus
Print_ISBN
978-1-4244-9755-3
Type
conf
DOI
10.1109/DDECS.2011.5783108
Filename
5783108
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