Selective instruction set muting for energy-aware adaptive processors

We propose a new way to save energy in adaptive processors. According to an execution context the custom instruction set of an adaptive processor is selectively ´muted´ at run time and thus the energy efficiency is significantly increased. Implemented are multiple so-called ´muting modes´ each leading to particular leakage energy savings. A key challenge of this work is to determine which of the muting modes are beneficial for which part of the custom instruction set in a specific execution context. We demonstrate the feasibility by means of an H.264 video encoder (although not limited to that) for various technology nodes. The complex and unpredictable processing behavior of an H.264 encoder represents thereby a real-world scenario. Our results show on average more than 30% energy savings compared to state-of-the-art. We claim that adaptive processors (and reconfigurable computing in general) would be far more energy efficient if FPGA vendors would provide a basic infrastructure that is necessary to exert our novel technique.