DocumentCode
3368443
Title
Formal Verification of Consistency between Feature Model and Software Architecture in Software Product Line
Author
Satyananda, Tonny Kurniadi ; Lee, Danhyung ; Kang, Sungwon
Author_Institution
Inf. & Commun. Univ., Daejeon
fYear
2007
fDate
25-31 Aug. 2007
Firstpage
10
Lastpage
10
Abstract
During software development process, software artifacts are produced. Consistency among these artifacts should be verified to ensure error-free product. In software product line development, consistency becomes more important because commonalities and variabilities increase the complexity of relationship among artifacts. In this paper, we present a formal approach to verification of consistency between feature model and component and connector view of software architecture. By utilizing prototype verification system (PVS), we introduce our model of feature description and architecture description, and illustrate the consistency verification approach using a digital watch product line example.
Keywords
formal specification; product development; program verification; software architecture; software reusability; architecture description; consistency verification; digital watch product line; error-free product; feature description; formal verification; prototype verification system; software architecture; software artifacts; software product line development; Asset management; Computer architecture; Computer errors; Connectors; Formal verification; Programming; Prototypes; Software architecture; Software prototyping; Watches;
fLanguage
English
Publisher
ieee
Conference_Titel
Software Engineering Advances, 2007. ICSEA 2007. International Conference on
Conference_Location
Cap Esterel
Print_ISBN
0-7695-2937-2
Electronic_ISBN
978-0-7695-2937-0
Type
conf
DOI
10.1109/ICSEA.2007.33
Filename
4299893
Link To Document