• DocumentCode
    3368489
  • Title

    A Block Cipher Circuit Design against Power Analysis

  • Author

    Yuxiao Ling ; Zheng Guo ; Zhimin Zhang ; Zhigang Mao ; Zeleng Zhuang

  • Author_Institution
    Sch. of Micro-Electron., Shanghai Jiao Tong Univ., Shanghai, China
  • fYear
    2013
  • fDate
    14-15 Dec. 2013
  • Firstpage
    449
  • Lastpage
    453
  • Abstract
    In this paper, we will present a block cipher circuit design against Power Analysis. This design consists of usual masking and hiding method. For XOR, permutation and other linear layer, masking method of protection is used, but for S-box and other non-linear layer, hiding method is used in the reason that masking requires a lot of hardware consumption. We accomplished hardware implementation and Power Analysis in our research, whose test results proved that the design had strong capacity against Power Analysis. 200, 000 curves were extracted in our attack simulation, and the key successfully resisted complete recovery.
  • Keywords
    cryptography; integrated circuit design; S-box; XOR; block cipher circuit design; hardware consumption; hiding method; linear layer; masking method; permutation; power analysis; protection; Algorithm design and analysis; Ciphers; Hardware; Integrated circuit modeling; Registers; Power Analysis; S-box; hiding; masking;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computational Intelligence and Security (CIS), 2013 9th International Conference on
  • Conference_Location
    Leshan
  • Print_ISBN
    978-1-4799-2548-3
  • Type

    conf

  • DOI
    10.1109/CIS.2013.101
  • Filename
    6746437