DocumentCode :
3369230
Title :
InP hot electron transistors with reduced emitter width for controllability of collector current by gate bias
Author :
Nakagawa, R. ; Takeuchi, K. ; Yamada, Y. ; Miyamoto, Y. ; Furuya, K.
Author_Institution :
Dept. of Phys. Electron., Tokyo Inst. of Technol., Japan
fYear :
2004
fDate :
31 May-4 June 2004
Firstpage :
179
Lastpage :
182
Abstract :
InP hot electron transistor with reduced emitter width was fabricated for controllability of collector current by gate bias. In our hot electron transistor, an electron propagates only through an intrinsic semiconductor. To reduce emitter width and remove the leak pass, InP regrowth process for metal gate was eliminated. As a result, the two-terminal emitter-gate current-voltage characteristics showed negative differential resistance and the emitter current passed through the double barrier structure was confirmed. Furthermore gate-collector leakage current could be reduced as a result of reducing gate electrodes area. In common-gate characteristics, linear increase of collector current due to resonant tunneling emitter structure was confirmed.
Keywords :
III-V semiconductors; electrodes; hot electron transistors; indium compounds; leakage currents; negative resistance; resonant tunnelling; InP; collector current; differential resistance; gate bias; gate-collector leakage current; hot electron transistors; metal gate; regrowth process; resonant tunneling emitter structure; two-terminal emitter-gate current-voltage characteristics; Controllability; Electrodes; Electron beams; Electron emission; Fabrication; Indium phosphide; Leakage current; Lithography; Particle scattering; Transistors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Indium Phosphide and Related Materials, 2004. 16th IPRM. 2004 International Conference on
ISSN :
1092-8669
Print_ISBN :
0-7803-8595-0
Type :
conf
DOI :
10.1109/ICIPRM.2004.1442640
Filename :
1442640
Link To Document :
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