DocumentCode :
3369585
Title :
Weak avalanche model for SOI and cryogenic analog circuits
Author :
Lai, J.C. ; Beaudoin, K.P.
Author_Institution :
Solid State Electron. Center, Honeywell Inc., Plymouth, MN, USA
fYear :
1995
fDate :
31 May-2 Jun 1995
Firstpage :
153
Lastpage :
158
Abstract :
A weak avalanche cryogenic model based on transverse field and temperature dependence for different scattering mechanisms that influence channel mobility is developed. The kink effect and weak avalanche are shown in both SOI/SOS (body floating) and bulk (carrier freeze-out) at cryogenic temperatures below 30 K. The negative conductance model based on both 2-dimensional electric field and temperature effect in SOI body tie transistors is also developed. Finally, weak avalanche effects for low Vgs conditions is also described and implemented in SPICE
Keywords :
CMOS analogue integrated circuits; MOSFET; SIMOX; SPICE; avalanche breakdown; carrier mobility; cryogenic electronics; impact ionisation; integrated circuit modelling; semiconductor device models; 2D electric field; 30 K; SOI body tie transistors; SOI/SOS; SPICE; Si; body floating type; bulk type; carrier freeze-out; channel mobility; cryogenic analog circuits; cryogenic temperatures; kink effect; negative conductance model; scattering mechanisms; temperature dependence; transverse field dependence; weak avalanche cryogenic model; Analog circuits; Cryogenics; Impact ionization; MOSFETs; SPICE; Scattering; Semiconductor device modeling; Silicon on insulator technology; Temperature; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Technology, Systems, and Applications, 1995. Proceedings of Technical Papers. 1995 International Symposium on
Conference_Location :
Taipei
ISSN :
1524-766X
Print_ISBN :
0-7803-2773-X
Type :
conf
DOI :
10.1109/VTSA.1995.524653
Filename :
524653
Link To Document :
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