DocumentCode :
336966
Title :
Source-level loop optimization for DSP code generation
Author :
Su, Bogong ; Wang, Jian ; Esguerra, Andrew
Author_Institution :
Dept. of Comput. Sci., William Paterson Coll., Wayne, NJ, USA
Volume :
4
fYear :
1999
fDate :
15-19 Mar 1999
Firstpage :
2155
Abstract :
The performance of current C compilers for DSP is almost unacceptable. One of the most important reasons is the lack of implementing software pipelining. This paper presents a remedy called source-level loop optimization. DSP programmers can use source-level loop optimization first then input its result to the DSP compiler to obtain better assembly code. The implementation of source-level loop optimization is easier than that of software pipelining. The preliminary result with the DSP compiler-challenge C code shows that source-level loop optimization is a portable and efficient approach. The detailed method and working examples are presented
Keywords :
compiler generators; digital signal processing chips; optimising compilers; parallel processing; pipeline processing; C compilers; DSP code generation; DSP compiler; assembly code; performance; software pipelining; source-level loop optimization; Computer science; Digital signal processing; Hardware; Microprocessors; Optimizing compilers; Pipeline processing; Program processors; Programming profession; Real time systems; Speech;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Acoustics, Speech, and Signal Processing, 1999. Proceedings., 1999 IEEE International Conference on
Conference_Location :
Phoenix, AZ
ISSN :
1520-6149
Print_ISBN :
0-7803-5041-3
Type :
conf
DOI :
10.1109/ICASSP.1999.758361
Filename :
758361
Link To Document :
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