DocumentCode :
3370356
Title :
Evaluation of a high performance code compression method
Author :
Lefurgy, Charles ; Piccininni, Eva ; Mudge, Trevor
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., Michigan Univ., Ann Arbor, MI, USA
fYear :
1999
fDate :
1999
Firstpage :
93
Lastpage :
102
Abstract :
Compressing the instructions of an embedded program is important for cost-sensitive low-power control-oriented embedded computing. A number of compression schemes have been proposed to reduce program size. However, the increased instruction density has an accompanying performance cost because the instructions must be decompressed before execution. In this paper, we investigate the performance penalty of a hardware-managed code compression algorithm recently introduced in IBM´s PowerPC 405. This scheme is the first to combine many previously proposed code compression techniques, making it an ideal candidate for study. We find that code compression with appropriate hardware optimizations does not have to incur much performance loss. Furthermore, our studies show this holds for architectures with a wide range of memory configurations and issue widths. Surprisingly, we find that a performance increase over native code is achievable in many situations
Keywords :
data compression; embedded systems; parallel architectures; performance evaluation; control-oriented embedded computing; embedded program; hardware-managed code compression; high performance code compression; performance cost; Advertising; Costs; Hardware; Instruction sets; Optimizing compilers; Performance analysis; Permission; Prefetching; Pulp manufacturing; Reduced instruction set computing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microarchitecture, 1999. MICRO-32. Proceedings. 32nd Annual International Symposium on
Conference_Location :
Haifa
ISSN :
1072-4451
Print_ISBN :
0-7695-0437-X
Type :
conf
DOI :
10.1109/MICRO.1999.809447
Filename :
809447
Link To Document :
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