DocumentCode :
3370456
Title :
A cost-effective MPEG-4 shape-adaptive DCT with auto-aligned transpose memory organization
Author :
Lee, Kun-Bin ; Hsu, Hui-Cheng ; Jen, Chein-Wei
Author_Institution :
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Volume :
2
fYear :
2004
fDate :
23-26 May 2004
Abstract :
This paper presents an efficient VLSI architecture of shape-adaptive discrete cosine transform (SA-DCT) for MPEG-4. The proposed architecture contains a cost-effective 1-D variable-length DCT engine and an auto-aligned transpose memory organization. Compared to other designs for SA-DCT, our architecture requires fewer multipliers whereas has higher throughout. Together with address generators and address pointers, the auto-aligned transpose memory organization can achieve transposing, shifting and aligning simultaneously without saving shape information. When clocking at 66.7 MHz, the proposed architecture has a throughput of 43.83 Mpixels/sec.
Keywords :
VLSI; discrete cosine transforms; image texture; memory architecture; multiplying circuits; storage management; transform coding; variable length codes; 66.7 MHz; MPEG-4; Moving Picture Experts Group; VLSI architecture; address generators; address pointers; auto aligned transpose memory organization; multipliers; one dimensional variable length DCT; shape adaptive discrete cosine transform; Clocks; Computer architecture; Discrete cosine transforms; Image coding; Layout; MPEG 4 Standard; Search engines; Shape; Throughput; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on
Print_ISBN :
0-7803-8251-X
Type :
conf
DOI :
10.1109/ISCAS.2004.1329387
Filename :
1329387
Link To Document :
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