• DocumentCode
    3370756
  • Title

    Shared memory systems on the Futurebus

  • Author

    Sweazey, Paul

  • Author_Institution
    Nat. Semicond. Corp., Santa Clara, CA, USA
  • fYear
    1988
  • fDate
    Feb. 29 1988-March 3 1988
  • Firstpage
    505
  • Lastpage
    511
  • Abstract
    The use of a cache memory on the Futurebus is discussed. An explanation of how these memories work and of cache coherence is given. The MOESI model of cache data is examined. A system of Futurebus modules interacting in the sharing of a single cache line is investigated.<>
  • Keywords
    buffer storage; computer interfaces; multiprocessing systems; parallel architectures; Futurebus; MOESI model; cache coherence; cache data; cache memory; shared memory systems; Backplanes; Bandwidth; Cache memory; Data structures; Engines; Filters; Memory architecture; Message passing; Microprocessors; System buses;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Compcon Spring '88. Thirty-Third IEEE Computer Society International Conference, Digest of Papers
  • Conference_Location
    San Francisco, CA, USA
  • Print_ISBN
    0-8186-0828-5
  • Type

    conf

  • DOI
    10.1109/CMPCON.1988.4920
  • Filename
    4920
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3370756