DocumentCode
3370920
Title
A novel scheme of implementing high speed AWGN communication channel emulators in FPGAs
Author
Fan, Yongquan ; Zilic, Zeljko
Author_Institution
MACS Lab., McGill Univ., Montreal, Que., Canada
Volume
2
fYear
2004
fDate
23-26 May 2004
Abstract
Hardware emulation of communication channels can speed up the process of estimating the performance of a communication system by a few orders of magnitude compared with traditional software-based estimations. This paper proposes a novel method for efficient implementation of additive white Gaussian noise (AWGN) generators in FPGAs for channel emulators. Compared to existing methods, the proposed method is faster and simpler to adopt. In this paper, the architecture and the performance analysis of our AWGN generators are elaborated.
Keywords
AWGN channels; field programmable gate arrays; noise generators; performance evaluation; AWGN generator; FPGA; additive white Gaussian noise generator; communication system; hardware emulation; high speed AWGN communication channel emulators implementation; performance analysis; AWGN; Clocks; Communication channels; Communication systems; Field programmable gate arrays; Hardware; Laboratories; Mathematical model; Random number generation; Random variables;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on
Print_ISBN
0-7803-8251-X
Type
conf
DOI
10.1109/ISCAS.2004.1329412
Filename
1329412
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