DocumentCode
3370994
Title
A unified architecture of MD5 and RIPEMD-160 hash algorithms
Author
Ng, Chiu-Wah ; Ng, Tung-Sang ; Yip, Kun-Wah
Author_Institution
Dept. of Electr. & Electron. Eng., Hong Kong Univ., China
Volume
2
fYear
2004
fDate
23-26 May 2004
Abstract
Hash algorithms are important components in many cryptographic applications and security protocol suites. In this paper, a unified architecture for MD5 and RIPEMD-160 hash algorithms is developed. These two algorithms are different in speed and security level. Therefore, a unified hardware design allows applications to switch from one algorithm to another based on different requirements. The architecture has been implemented using Altera´s EPF10K50SBC356-1, providing a throughput over 200 Mbits/s for MD5 and 80 Mbits/s for RIPEMD-160 when operated at 26.66 MHz with a resource utilization of 1964LC.
Keywords
cryptography; field programmable gate arrays; protocols; Altera EPF10K50SBC356-1 algorithm; MD5 hash algorithm; RIPEMD-160 hash algorithm; cryptographic applications; security protocol; unified architecture; unified hardware design; Algorithm design and analysis; Computer architecture; Cryptographic protocols; Cryptography; Hardware; Iterative algorithms; Protection; Security; Switches; Throughput;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on
Print_ISBN
0-7803-8251-X
Type
conf
DOI
10.1109/ISCAS.2004.1329415
Filename
1329415
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