Systolic counters with unique zero state

Systolic counters have a clock period independent of counter size at the expense of representing the count value as a redundant number. Previously proposed systolic counters need to be initialized to non-zero values in order to enter the desired repetitive sequence without a transient phase. This is due to the non-unique redundant representation of the zero-state for up-counters. We propose a systolic down-counter that enters a repetitive sequence directly after reset as it has a unique representation of the zero state. We show that the uniqueness of the zero state is also convenient for modulo-p systolic counters.