Title :
Suppressing the parasitic bipolar action of ultra-thin SOI MOSFET´s using back-side-bias-temperature treatment
Author :
Koizumi, Hiroshi ; Shimaya, Masakazu ; Tsuchiya, Toshiaki
Author_Institution :
NTT LSI Labs., Atsugi, Japan
fDate :
April 30 1996-May 2 1996
Abstract :
A new suppression method for parasitic bipolar action is presented for fully depleted surface-channel nMOSFET´s on SOI by using the back-side-bias-temperature (BSBT) treatment technique. This method improves subthreshold characteristics, source-drain breakdown voltage, and hot-carrier instability without degrading device characteristics. BSBT treatment can suppress the parasitic bipolar action regardless of stress bias polarity. BSBT damage to the back-side interface between buried oxide and active silicon layer was investigated using several methods. The suppression mechanism proposed is the generation of fixed charges and interface traps at the back-side interface.
Keywords :
MOSFET; electric breakdown; hot carriers; interface states; semiconductor device reliability; silicon-on-insulator; Si; back-side-bias-temperature treatment; fixed charges generation; fully depleted surface-channel nMOSFET; hot-carrier instability; interface traps; n-channel MOSFET; parasitic bipolar action suppression; source-drain breakdown voltage; stress bias polarity; subthreshold characteristics; suppression method; ultra-thin SOI MOSFET; Current measurement; Electrodes; Intrusion detection; Low voltage; MOSFET circuits; Ovens; Silicon; Stress measurement; Temperature; Voltage measurement;
Conference_Titel :
Reliability Physics Symposium, 1996. 34th Annual Proceedings., IEEE International
Conference_Location :
Dallas, TX, USA
Print_ISBN :
0-7803-2753-5
DOI :
10.1109/RELPHY.1996.492057