Improving symbolic analysis in CMOS analog integrated circuits

Author

Aguila-Meza, J. ; Torres-Papaqui, L. ; Tielo-Cuautle, E.

Author_Institution

National Inst. for Astophysics, Opt., & Electron., Puebla, Mexico

Volume

5

fYear

2004

fDate

23-26 May 2004

Abstract

A symbolic method to improve the computation of simple symbolic expressions (SEs), which represent the dominant behavior of a CMOS analog IC, is presented. It is demonstrated that the complexity in manipulating ESs, being minimized by modelling the behavior of the MOSFET using ors, at different levels of abstraction. In this manner, to improve traditional symbolic methods, the formulation of a compacted system of equations (CSEss) is computed herein by selecting the simplest model for the MOSFET, and by manipulating the interconnection-relationships of the circuit. The proposed method sets the guidelines to select the correct model, which minimizes computer-tasks by considering the bias and frequency operating conditions of every MOSFET.

Keywords

CMOS analogue integrated circuits; MOSFET; active networks; circuit CAD; integrated circuit design; integrated circuit modelling; CMOS analog integrated circuits; MOSFET; abstraction levels; analog design automation; bias operating conditions; compacted system of equations; data structures; frequency operating conditions; interconnection-relationships; ors; symbolic analysis; symbolic expressions; Analog computers; Analog integrated circuits; CMOS analog integrated circuits; CMOS integrated circuits; Electronic switching systems; Equations; Guidelines; Integrated circuit interconnections; MOSFET circuits; Semiconductor device modeling;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on

Print_ISBN

0-7803-8251-X

Type

conf

DOI

10.1109/ISCAS.2004.1329495

Filename

1329495