DocumentCode :
3372511
Title :
Reconfigurable, spectrally efficient, high data rate IR-UWB transmitter design using a Δ–Σ PLL driven ILO and a 7-tap FIR filter
Author :
Li, Jun ; Zhou, Bo ; Sun, Yuanfeng ; Rhee, Woogeun ; Wang, ZhiHua
Author_Institution :
Inst. of Microelectron., Tsinghua Univ., Beijing, China
fYear :
2011
fDate :
25-28 April 2011
Firstpage :
1
Lastpage :
4
Abstract :
This paper proposes a reconfigurable, spectrally efficient 7-tap FIR pulse based UWB transmitter with the maximum pulse rate of 1.6Gpulses/s. By utilizing a Δ-Σ PLL and a DAC embedded FIR pulse generator, digitally configurable pulse generation is done with high spectral efficiency. For low power 7-tap FIR pulse generation, a 1/8-rate, 16-phase injection-locked oscillator (ILO) is designed instead of the full-rate 15GHz PLL. A prototype 50pJ/pulse UWB transmitter is implemented in 90nm CMOS, consuming 80mW power from a 1.2V supply voltage.
Keywords :
CMOS integrated circuits; FIR filters; delta-sigma modulation; injection locked oscillators; network synthesis; phase locked loops; radio transmitters; ultra wideband communication; Δ-Σ PLL driven ILO; 7-tap FIR filter; CMOS; DAC embedded FIR pulse generator; digitally configurable pulse generation; high data rate IR-UWB transmitter; maximum pulse rate; phase injection-locked oscillator; power 80 mW; reconfigurable IR-UWB transmitter; size 90 nm; spectrally efficient IR-UWB transmitter; voltage 1.2 V; Clocks; Finite impulse response filter; Frequency modulation; Phase locked loops; Pulse generation; Radio transmitters; Voltage-controlled oscillators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, Automation and Test (VLSI-DAT), 2011 International Symposium on
Conference_Location :
Hsinchu
ISSN :
Pending
Print_ISBN :
978-1-4244-8500-0
Type :
conf
DOI :
10.1109/VDAT.2011.5783602
Filename :
5783602
Link To Document :
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