DocumentCode :
3372853
Title :
On-chip multiprocessor design
Author :
Kang, Jun-Woo ; Rim, Kee-Wook
Author_Institution :
Electron. & Telecommun. Res. Inst., Taejeon, South Korea
fYear :
1995
fDate :
31 May-2 Jun 1995
Firstpage :
230
Lastpage :
234
Abstract :
Integrating processors into a chip is one of leading technologies in the microprocessor as well as in the semiconductor processing technology. This paper describes EMPC-96 which is a DBMS application-specific on-chip microprocessor for MPP systems. Four integer units, data cache, instruction cache, and system interfaces are integrated into one chip, and the caches are shared among integer units. 400 MIPS is a performance target of this design
Keywords :
CMOS digital integrated circuits; application specific integrated circuits; cache storage; database management systems; microprocessor chips; parallel architectures; 0.5 micron; 400 MIPS; CMOS microprocessor; DBMS application-specific microprocessor; EMPC-96; MPP systems; data cache; instruction cache; integer units; onchip multiprocessor design; system interfaces; Communication system control; Hardware; Lead compounds; Logic design; Microprocessors; Pipelines; Processor scheduling; System-on-a-chip; VLIW; Yarn;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Technology, Systems, and Applications, 1995. Proceedings of Technical Papers. 1995 International Symposium on
Conference_Location :
Taipei
ISSN :
1524-766X
Print_ISBN :
0-7803-2773-X
Type :
conf
DOI :
10.1109/VTSA.1995.524669
Filename :
524669
Link To Document :
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