DocumentCode :
3373465
Title :
Delay analysis of micropipelines
Author :
Chang, Chih-Ming ; Lu, Shih-Lien
Author_Institution :
Dept. of Electr. & Comput. Eng., Oregon State Univ., Corvallis, OR, USA
fYear :
1995
fDate :
31 May-2 Jun 1995
Firstpage :
247
Lastpage :
251
Abstract :
In this paper, the behaviors of asynchronous linear micropipelines are investigated. By introducing logic delays for C-elements, the linear micropipelines can be fully described by sets of governing equations. The properties of logic delays are studied when a linear micropipeline reaches steady state
Keywords :
asynchronous circuits; delays; pipeline processing; C-elements; asynchronous linear micropipelines; logic delays; Asynchronous circuits; Bismuth; Computer architecture; Costs; Delay effects; Equations; Logic; Pipelines; Research and development; Steady-state;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Technology, Systems, and Applications, 1995. Proceedings of Technical Papers. 1995 International Symposium on
Conference_Location :
Taipei
ISSN :
1524-766X
Print_ISBN :
0-7803-2773-X
Type :
conf
DOI :
10.1109/VTSA.1995.524672
Filename :
524672
Link To Document :
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