DocumentCode :
3373518
Title :
System-level design of low complexity CVNS feed forward neural network
Author :
Mirhassani, Mitra ; Zamanlooy, Babak
Author_Institution :
Electr. & Comput. Eng. Dept., Univ. of Windsor, Windsor, ON, Canada
fYear :
2010
fDate :
May 30 2010-June 2 2010
Firstpage :
2578
Lastpage :
2581
Abstract :
In order to optimally set up and configure an analog neural network in system-level, fundamental issues such as accuracy, robustness, function smoothness and minimality has to be considered. This paper focuses on choosing optimal Continuous Valued Number System (CVNS) neural networks, and shows using system-level analysis that how CVNS networks can be used to implement large size networks. The network is implemented using analog non-linear activation function with more precision, and provides more accuracy in comparison to analog networks. The CVNS computation system which is used as an alternative method of implementation, is analog in nature and employs digit-level analog modular arithmetic. The information redundancy among the digits can be used to increase the accuracy of the precision using analog circuitry with arbitrary accuracy. Moreover, the system configuration take advantage of distributed neuron properties. This type of neurons reduce overall network sensitivity to mismatches that are inherent in any neural networks implemented by analog circuitries. Moreover, to reduce the network complexity in terms of number of interconnections, a series configuration of multiplexer and demultiplexer is used. Weights are refreshed and refined as an overall approach to maintain the weights stored on chip, and are not used to compute network response. To study overall accuracy of the system, stochastic modeling of the network is carried out. The proposed network has comparable sensitivity to other CVNS Madaline, while reduces the network complexity in terms of reducing computing units and interconnections proportional by a factor proportional to the network nodes.
Keywords :
feedforward neural nets; interconnections; network analysis; neural chips; analog circuitry; analog neural network; analog nonlinear activation function; continuous valued number system neural networks; demultiplexer; digit-level analog modular arithmetic; distributed neuron properties; feed forward neural network; information redundancy; interconnections; large size networks; multiplexer; network complexity; network nodes; network response; network sensitivity; stochastic modeling; system configuration; system-level analysis; system-level design; Analog computers; Arithmetic; Computer networks; Feedforward neural networks; Feeds; Integrated circuit interconnections; Neural networks; Neurons; Robustness; System-level design;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on
Conference_Location :
Paris
Print_ISBN :
978-1-4244-5308-5
Electronic_ISBN :
978-1-4244-5309-2
Type :
conf
DOI :
10.1109/ISCAS.2010.5537102
Filename :
5537102
Link To Document :
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