Title :
A Novel ATPG Framework to Detect Weight Related Defects in Threshold Logic Gates
Author :
Goparaju, Manoj Kumar ; Tragoudas, Spyros
Author_Institution :
Dept. of Electr. & Comput. Eng., Southern Illinois Univ. Carbondale, Carbondale, IL
fDate :
April 27 2008-May 1 2008
Abstract :
The gate that is implemented with threshold logic is called a threshold logic gate (TLG). The logic output value of an TLG depends on the weighted sum of its inputs. Manufactured weights in the threshold logic gates (TLGs) may differ from the designed values and significantly affects the fault coverage. A novel automatic test pattern generation (ATPG) tool is proposed to detect whether the circuit is malfunctioning due to such weight-related defects.
Keywords :
automatic test pattern generation; fault diagnosis; logic gates; logic testing; automatic test pattern generation; threshold logic gate; weight related defect; Automatic test pattern generation; CMOS logic circuits; CMOS technology; Circuit faults; Logic design; Logic devices; Logic gates; Logic testing; Manufacturing; Very large scale integration; ATPG; Parametric faults; Threshold logic; Weght defects;
Conference_Titel :
VLSI Test Symposium, 2008. VTS 2008. 26th IEEE
Conference_Location :
San Diego, CA
Print_ISBN :
978-0-7695-3123-6
DOI :
10.1109/VTS.2008.43
