FPGA implementation of dynamic key management for DES encryption algorithm

A hardware design with the dynamic key management is proposed based on the conventional DES algorithm, and the FPGA implementation is presented in this paper. Based on the analysis of the principle of DES encryption algorithm, the relativity between the generation of sub-key and the critical arithmetic is weak. So the key can be reconfigured. During the FPGA hardware design, the methodology of preferential resources is adopted. For the round-function, the pipeline technology is used to increase the maximum frequency. The independent FPGA implementations of round-function and key generator can not only reduce the logic complication of adjacent pipeline but also realize the reconfiguration design of DES algorithm. The function simulation and test analysis based on the design is verified, and the result is satisfied.