Title :
A bidirectional vector associative memory architecture with application to neural networks
Author :
Zhang, C.N. ; Wang, M. ; Chou, W.K.
Author_Institution :
Dept. of Comput. Sci., Regina Univ., Sask., Canada
fDate :
31 May-2 Jun 1995
Abstract :
A bidirectional architecture for associative memory (AM) capable of vector arithmetic operations is proposed. Conventional bit-operation and word-operation are generalized to row and column operations, respectively. By introducing a pair of masking and tagging mechanisms, the proposed architecture demonstrates a symmetric functionality such that associative memory can be performed in both column and row directions. A set of built-in vector arithmetic and logic units (VALU) are designed to perform the basic vector operations, which offers O(max{n,m}) speed-up for vector operations than conventional AM at a linear (O(n+m)) cost for realizing an n×m AM array. As an applicational example, an associative processing implementation of artificial neural networks is considered
Keywords :
content-addressable storage; memory architecture; neural net architecture; neural nets; vector processor systems; artificial neural network; associative memory; bidirectional architecture; bit operations; column operations; masking; row operations; symmetric functionality; tagging; vector arithmetic and logic unit; word operations; Arithmetic; Artificial neural networks; Associative memory; Associative processing; Costs; Logic arrays; Logic design; Memory architecture; Tagging; Vectors;
Conference_Titel :
VLSI Technology, Systems, and Applications, 1995. Proceedings of Technical Papers. 1995 International Symposium on
Conference_Location :
Taipei
Print_ISBN :
0-7803-2773-X
DOI :
10.1109/VTSA.1995.524674