DocumentCode :
3374036
Title :
A consistent and scalable PSPICE HFET-Model for DC- and S-parameter-simulation
Author :
Ehrich, Silja ; Bertenburg, R.M. ; Agethen, Michael ; Brennemann, A. ; Brockerhoff, Wolfgang ; Tegude, Franz-Josef
Author_Institution :
Solid-State Electron. Dept., Gerhard-Mercator-Univ. Duisburg, Germany
fYear :
2002
fDate :
8-11 April 2002
Firstpage :
67
Lastpage :
70
Abstract :
For simulation of digital circuits realized in Direct Coupled FET Logic (DCFL) using depletion-type as well as enhancement-type Heterostructure-Field Effect Transistors (HFET) a consistent model that is able to describe both types of transistors is necessary. The developed analytical PSPICE model takes into account all relevant intrinsic and parasitic effects. This model can be used for dc- as well as rf-simulations and is scaleable with respect to gate-width as well as gate-length.
Keywords :
S-parameters; SPICE; direct coupled FET logic; junction gate field effect transistors; semiconductor device models; DC simulation; Direct Coupled FET Logic; RF simulation; S-parameter; depletion-type HFET; digital circuit; enhancement-type HFET; heterostructure field effect transistor; scalable PSPICE model; Capacitance measurement; Circuit simulation; HEMTs; MODFETs; SPICE; Schottky diodes; Solid modeling; Solid state circuits; Transistors; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microelectronic Test Structures, 2002. ICMTS 2002. Proceedings of the 2002 International Conference on
Print_ISBN :
0-7803-7464-9
Type :
conf
DOI :
10.1109/ICMTS.2002.1193173
Filename :
1193173
Link To Document :
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