Title :
A reconfigurable multi-processor SoC for media applications
Author :
Zhu, Min ; Liu, Leibo ; Yin, Shouyi ; Wang, Yansheng ; Wang, Wenjie ; Wei, Shaojun
Author_Institution :
Res. Center for Mobile Comput., Tsinghua Univ., Beijing, China
fDate :
May 30 2010-June 2 2010
Abstract :
This paper proposes a reconfigurable multi-processor SoC for media applications called REMUS (REconfigurable Multi-media System), which consists of 512 processing engines and two ARMs. The processing engines are divided into two dynamic configuration groups, which can be easily tailored and extended. The processing engines, DBIs (Data Buffering Interface, DBI) and context interfaces build up a large throughput computing system with thread parallelism, algorithms parallelism and data parallelism. Different algorithms can be mapped in at the same time. REMUS is suitable for many applications such as media decoding and baseband processing, etc. Simulation results show that the processing capability of REMUS is to support 1920*1088 @30fps videos at 200 MHz in real-time decoding of H.264 high-profile streams.
Keywords :
autoregressive moving average processes; microprocessor chips; multimedia systems; parallel architectures; reconfigurable architectures; system-on-chip; video coding; ARM; DBI; H.264 high-profile streams; REMUS; algorithms parallelism; baseband processing; context interfaces; data buffering interface; data parallelism; media applications; media decoding; processing engines; real-time decoding; reconfigurable multimedia system; reconfigurable multiprocessor SoC; thread parallelism; throughput computing system; Arm; Computer buffers; Computer interfaces; Concurrent computing; Decoding; Engines; Multimedia systems; Parallel processing; Throughput; Yarn;
Conference_Titel :
Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on
Conference_Location :
Paris
Print_ISBN :
978-1-4244-5308-5
Electronic_ISBN :
978-1-4244-5309-2
DOI :
10.1109/ISCAS.2010.5537147
