Title :
SEESIM-a fast synchronous sequential circuit fault simulator with single event equivalence
Author :
Wu, Ching Ping ; Lee, Chung Len ; Shen, Wen Zen
Author_Institution :
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Abstract :
The authors present a sequential circuit fault simulator of `single event equivalent´, which combines the advantages of several techniques: fanout-free region, critical path tracing, and the dominator, techniques which were previously only applicable to combinational fault simulation. The simulator requires the minimal amount of memory, and its speed is superior to that of a state-of-the-art concurrent fault simulator and comparable with parallel type fault simulators
Keywords :
fault location; logic CAD; sequential circuits; SEESIM; concurrent fault simulator; critical path tracing; dominator; fanout-free region; fast synchronous sequential circuit fault simulator; parallel type fault simulators; single event equivalence; single event equivalent; Automatic test pattern generation; Automatic testing; Circuit faults; Circuit simulation; Circuit testing; Discrete event simulation; Logic; Sequential analysis; Sequential circuits; System testing;
Conference_Titel :
Design Automation Conference, 1992., EURO-VHDL '92, EURO-DAC '92. European
Conference_Location :
Hamburg
Print_ISBN :
0-8186-2780-8
DOI :
10.1109/EURDAC.1992.246205