DocumentCode
3374994
Title
Special session: Hot topic: Smart silicon
Author
Winemberg, LeRoy ; Tehranipoor, Mohammad
fYear
2011
fDate
1-5 May 2011
Firstpage
323
Lastpage
323
Abstract
The goal of this hot topic session is to discuss this cutting-edge topic that is being researched by several teams in both academia and industry, and debate which is the best approach for sub-65nm silicon designs. The point of debate will be what embedded circuits make the most sense (aging, enablement of more aggressive design, characterization, diagnosis, debug, etc.).
Keywords
ageing; elemental semiconductors; integrated circuit design; silicon; Si; academia; aggressive design; aging; characterization; cutting-edge topic; debug; diagnosis; embedded circuits; industry; smart silicon; sub-65nm silicon designs; Aging; Artificial intelligence; Economics; Indium tin oxide; Lead; Monitoring; Stacking;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Test Symposium (VTS), 2011 IEEE 29th
Conference_Location
Dana Point, CA
ISSN
1093-0167
Print_ISBN
978-1-61284-657-6
Type
conf
DOI
10.1109/VTS.2011.5783742
Filename
5783742
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