Low-cost low-power bypassing-based multiplier design

Based on the simplification of the addition operations in a low-power bypassing-based multiplier, a low-cost low-power bypassing-based multiplier is proposed Compared with row-bypassing multiplier, column-bypassing multiplier and 2-dimensional bypassing-based multiplier for 20 tested examples, the experimental results show that our proposed low-cost low-power multiplier saves 15.1% of hardware cost and reduces 29.6% of the power dissipation on the average for 4×4, 8×8 and 16×16 multipliers.