• DocumentCode
    3375317
  • Title

    The exact solution of timing verification

  • Author

    Bolender, Edgar ; Lipp, Hans Martin

  • Author_Institution
    Inst. fuer Tech. der Inf., Karlsruhe Univ., Germany
  • fYear
    1992
  • fDate
    7-10 Sep 1992
  • Firstpage
    132
  • Lastpage
    137
  • Abstract
    The authors describe a new method of timing verification that searches the longest sensitizable path of a combinationorial network. The algorithm is exact in the sense that an exhaustive simulation would produce the same result. The concept of robustness in the algorithm is included. The extension of the theory for edge dependent delays has been completed
  • Keywords
    circuit analysis computing; combinatorial circuits; delays; combinationorial network; edge dependent delays; exhaustive simulation; longest sensitizable path; robustness; timing verification; Circuit testing; Delay effects; Logic circuits; Switching circuits; Timing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 1992., EURO-VHDL '92, EURO-DAC '92. European
  • Conference_Location
    Hamburg
  • Print_ISBN
    0-8186-2780-8
  • Type

    conf

  • DOI
    10.1109/EURDAC.1992.246253
  • Filename
    246253
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3375317