1200 V-trench-IGBT study with square short circuit SOA

Author

Laska, T. ; Pfirsch, F. ; Hirler, F. ; Niedermey, J. ; Schaffer, C. ; Schmidt, T.

Author_Institution

Siemens AG, Munich, Germany

fYear

1998

fDate

3-6 Jun 1998

Firstpage

433

Lastpage

436

Abstract

In this paper, the authors discuss the design of a new 1200 V trench IGBT structure. The combination of well-designed trench cell geometry and a favourably adjusted vertical carrier concentration profile leads to a trench IGBT chip with both low static and dynamic losses and a degree of ruggedness similar to state-of-the-art planar cell nonpunch-through (NPT) IGBTs, especially excellent gate oxide properties, high turn-off capability and a square short circuit safe operating area up to 1200 V

Keywords

carrier density; dielectric thin films; insulated gate bipolar transistors; isolation technology; losses; power bipolar transistors; semiconductor device reliability; semiconductor device testing; 1200 V; dynamic losses; gate oxide properties; planar cell nonpunch-through IGBTs; square short circuit SOA; square short circuit safe operating area; static losses; trench IGBT; trench IGBT chip; trench IGBT structure; trench cell geometry; turn-off capability; vertical carrier concentration profile; Circuit testing; Insulated gate bipolar transistors; Integrated circuit testing; Latches; Robustness; Semiconductor optical amplifiers; Short circuit currents; Surface waves; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Power Semiconductor Devices and ICs, 1998. ISPSD 98. Proceedings of the 10th International Symposium on

Conference_Location

Kyoto

ISSN

1063-6854

Print_ISBN

0-7803-4752-8

Type

conf

DOI

10.1109/ISPSD.1998.702738

Filename

702738