Power-safe test application using an effective gating approach considering current limits

Freezing scan cell outputs can block transitions to the combinational components thus reduce shift power. The extra logic introduces area overhead, reduces timing margin and increases power in capture mode. This paper proposes a partial gating flow that calculates instance toggling probability to identify power sensitive cells. The toggling rate reduction tendency is demonstrated to be useful in estimating how much extra logic is needed to achieve a desired shift power reduction rate for a design. To ensure power safety across entire test session, the toggling rate metric is enhanced to consider the effect of capture power increase. A complementary pair of weights can adjust the power change in shift and capture modes, thus achieve an overall balanced power safety. The toggling probability metric along with the proposed flow provide a flexibility that benefits various practical power requirements when considering current limits of both circuit and tester.