Coverage closure in SoC verification: Are we chasing a mirage?

With over 78% of designs being heterogeneous integrations of diverse components, SoCs are ubiquitous. This integration, though, brings with it the malaise of challenges in verification and validation. SoC verification has a number of unique challenges beyond traditional ASIC type of designs. The typical SoC flow consists of the following development phases: System Design, Software Design, HW/SW Integration, SoC HW Integration and HW IP design.