DocumentCode :
3376146
Title :
VHDL for high speed desktop video ICs-experience with replacement of other simulator
Author :
Jacobsen, Michael ; Nebel, Wolfgang
Author_Institution :
Philips Semicond., Hamburg, Germany
fYear :
1992
fDate :
7-10 Sep 1992
Firstpage :
652
Lastpage :
657
Abstract :
A simulation methodology used for high-speed digital video processing IC development is described. The simulation environment is optimized to meet application-specific requirements for the efficient hierarchical mixed-level simulation of large stimuli sets. To increase design efficiency, the simulation flow has been adapted to VHSIC hardware description language (VHDL). Details of the implementation strategy and performance gains achieved are reported
Keywords :
circuit CAD; digital signal processing chips; specification languages; VHDL; VHSIC; application-specific requirements; hardware description language; high speed desktop video ICs; mixed-level simulation; simulation methodology; Circuit simulation; Circuit testing; Digital integrated circuits; High speed integrated circuits; Jacobian matrices; Libraries; Logic testing; Performance gain; Timing; Video signal processing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 1992., EURO-VHDL '92, EURO-DAC '92. European
Conference_Location :
Hamburg
Print_ISBN :
0-8186-2780-8
Type :
conf
DOI :
10.1109/EURDAC.1992.246343
Filename :
246343
Link To Document :
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