DocumentCode
3376972
Title
Mathematical yield estimation for two-dimensional-redundancy memory arrays
Author
Chao, Mango C T ; Chin, Ching-Yu ; Lin, Chen-Wei
Author_Institution
Dept. of Electron. Eng., Nat. Chiao-Tung Univ., Hsinchu, Taiwan
fYear
2010
fDate
7-11 Nov. 2010
Firstpage
235
Lastpage
240
Abstract
Defect repair has become a necessary process to enhance the overall yield for memories since manufacturing a natural good memory is difficult in current memory technologies. This paper presents an yield-estimation scheme, which utilizes an induction-based approach to calculate the probability that all defects in a memory can be successfully repaired by a two-dimensional redundancy design. Unlike previous works, which rely on a time-consuming simulation to estimate the expected yield, our yield-estimation scheme only requires scalable mathematical computation and can achieve a high accuracy with limited time and space complexity. Also, the proposed estimation scheme can consider the impact of single defects, column defects, and row defects simultaneously. With the help of the proposed yield-estimation scheme, we can effectively identify the most profitable redundancy configuration for large memory designs within few seconds while it may take several hours or even days by using conventional simulation approach.
Keywords
estimation theory; integrated circuit yield; logic arrays; probability; semiconductor storage; defect probability; defect repair; induction based approach; mathematical yield estimation; two dimensional redundancy memory arrays; Accuracy; Algorithm design and analysis; Equations; Estimation; Maintenance engineering; Mathematical model; Redundancy;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer-Aided Design (ICCAD), 2010 IEEE/ACM International Conference on
Conference_Location
San Jose, CA
ISSN
1092-3152
Print_ISBN
978-1-4244-8193-4
Type
conf
DOI
10.1109/ICCAD.2010.5654154
Filename
5654154
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