DocumentCode
3377113
Title
Yield enhancement for 3D-stacked memory by redundancy sharing across dies
Author
Jiang, Li ; Ye, Rong ; Xu, Qiang
Author_Institution
Dept. of Comput. Sci. & Eng., Chinese Univ. of Hong Kong, Shatin, China
fYear
2010
fDate
7-11 Nov. 2010
Firstpage
230
Lastpage
234
Abstract
Three-dimensional (3D) memory products are emerging to fulfill the ever-increasing demands of storage capacity. In 3D-stacked memory, redundancy sharing between neighboring vertical memory blocks using short through-silicon vias (TSVs) is a promising solution for yield enhancement. Since different memory dies are with distinct fault bitmaps, how to selectively matching them together to maximize the yield for the bonded 3D-stacked memory is an interesting and relevant problem. In this paper, we present novel solutions to tackle the above problem. Experimental results show that the proposed methodology can significantly increase memory yield when compared to the case that we only bond self-reparable dies together.
Keywords
integrated circuit yield; integrated memory circuits; three-dimensional integrated circuits; 3D-stacked memory; redundancy sharing across dies; short through-silicon vias; storage capacity; three-dimensional memory products; yield enhancement; Bonding; Circuit faults; Maintenance engineering; Memory management; Optimal matching; Redundancy; Three dimensional displays;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer-Aided Design (ICCAD), 2010 IEEE/ACM International Conference on
Conference_Location
San Jose, CA
ISSN
1092-3152
Print_ISBN
978-1-4244-8193-4
Type
conf
DOI
10.1109/ICCAD.2010.5654160
Filename
5654160
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