Title :
FSMD functional partitioning for low power
Author :
Hwang, Enoch ; Vahid, Frank ; Hsu, Yu-Chin
Author_Institution :
Dept. of Comput. Sci. & Eng., California Univ., Riverside, CA, USA
Abstract :
Previous work has shown that sizable power reductions can be achieved by shutting down a system´s sub-circuits when they are not needed. However, these shutdown techniques focus on shutting down only portions of the controller or the datapath of a single custom hardware processor. We propose a higher level shutdown technique that considers both the controller and datapath simultaneously; in particular, we partition a processor into multiple simpler mutually-exclusive communicating processors, and then shut down the inactive processors (i.e., the inactive controller/datapath pairs). Power reduction is accomplished because only one smaller processor is active at a time. In addition to power reduction, functional partitioning also provides solutions to a variety of synthesis problems and does not require the modification of the synthesis tool. We present results showing that this FSMD functional partitioning technique can reduce power, on average, 42% over unoptimized systems.
Keywords :
VLSI; circuit CAD; finite state machines; integrated circuit design; logic CAD; logic partitioning; low-power electronics; FSM datapath; FSM synthesis; FSMD functional partitioning; controller shutdown; datapath shutdown technique; low power design; power reductions; Circuits; Clocks; Computer science; Equations; Partial discharges; Power engineering and energy; Reactive power; Read only memory; Switching frequency; Very large scale integration;
Conference_Titel :
Design, Automation and Test in Europe Conference and Exhibition 1999. Proceedings
Conference_Location :
Munich, Germany
Print_ISBN :
0-7695-0078-1
DOI :
10.1109/DATE.1999.761092