DocumentCode
3377963
Title
A fault signature approach to analog devices testing
Author
Corsi, F. ; Chiarantoni, M. ; Lorusso, R. ; Marzocca, C.
Author_Institution
Dipartimento di Elettrotecnica ed Elettronica, Bari Univ., Italy
fYear
1993
fDate
19-22 Apr 1993
Firstpage
116
Lastpage
121
Abstract
A time domain technique for go-no-go testing of linear analog devices has been analysed in order to identify the conditions that maximise its sensitivity to structural and drift failures. The application to a commercial CMOS operational amplifier showing its ability to cover almost all of the assumed faults, and the ease of generation of the test stimulus on standard ATE equipments, suggest variable applications to production testing
Keywords
CMOS integrated circuits; automatic test equipment; automatic testing; fault location; integrated circuit testing; linear integrated circuits; production testing; analog devices testing; complementary signal method; drift failures; fault signature; go-no-go testing; linear analog devices; operational amplifier; production testing; sensitivity; simulation; structural failures; time domain; Automatic testing; Circuit faults; Circuit testing; Electronic equipment testing; Failure analysis; Integrated circuit testing; Production; Pulse measurements; System testing; Time domain analysis;
fLanguage
English
Publisher
ieee
Conference_Titel
European Test Conference, 1993. Proceedings of ETC 93., Third
Conference_Location
Rotterdam
Print_ISBN
0-8186-3360-3
Type
conf
DOI
10.1109/ETC.1993.246526
Filename
246526
Link To Document