Analog fault diagnosis: a fault clustering approach

Author

Somayajula, Shyam S. ; Sánchez-Sinencio, Edgar ; De Gyvez, José Pineda

Author_Institution

Dept. of Electr. Eng., Texas A&M Univ.,College Station, TX, USA

fYear

1993

fDate

19-22 Apr 1993

Firstpage

108

Lastpage

115

Abstract

A novel analog circuit fault diagnosis method is proposed. This method uses a neural network paradigm to cluster different faults. It is capable of dealing with the common fault models in analog circuits, namely the catastrophic and parametric faults. The proposed technique is independent of the linearity or nonlinearity of the circuit. The process parameter drifts and component tolerance effects of the circuit are well taken care of. Several fault diagnosis strategies for different problem complexities are described. The proposed methodology is illustrated by means of an operational transconductance amplifier (OTA) example

Keywords

analogue circuits; fault location; learning (artificial intelligence); linear integrated circuits; neural nets; operational amplifiers; pattern recognition; Kohonen network; analog circuit; catastrophic faults; component tolerance effects; fault clustering; fault diagnosis; learning; neural network; parametric faults; process parameter drifts; signatures; Analog circuits; Analog integrated circuits; Circuit faults; Circuit simulation; Counting circuits; Digital circuits; Energy consumption; Fault diagnosis; Neural networks; Silicon;

fLanguage

English

Publisher

ieee

Conference_Titel

European Test Conference, 1993. Proceedings of ETC 93., Third

Conference_Location

Rotterdam

Print_ISBN

0-8186-3360-3

Type

conf

DOI

10.1109/ETC.1993.246527

Filename

246527