Abstract :
The design of modulo 2k + 1 adders for arbitrary k is considered, with the objective of achieving a logic structure as regular as possible so as to allow a convenient implementation in large-scale integration technology (LSI). It is shown how the design problem can be reduced to the recursive generation of a subtract signal and to the merging, in various degrees, of the corresponding logic with the logic of an ordinary adder or, alternately, of a so-called signed-carry adder which is defined and designed itself in general, with both recursive and explicit carry schemes. Modulo 2k + 1 adder designs are given, one with conventional adder, another based on signed-carry adder and a third, derived from the signed-carry scheme, where subtract signal generation and carry logic are merged. This last scheme can be set up with two backward recursion chains and five or six forward ones. Two more basic variants are finally indicated for this integrated scheme, aiming at reducing as much as possible the residual logic structure irregularity presented by the most significant position in the word
