Title :
On scan path design for stuck-open and delay fault detection
Author :
Leenstra, Jens ; Koch, Michael ; Schwederski, Thomas
Author_Institution :
Inst. for Microelectron. Stuttgart, Germany
Abstract :
A novel scan path design technique is presented, which facilitates the application of two-pattern tests by transition shifting. The scan path is composed based on the test data set as a graph matching problem. For the reduction of the required test application time, a novel reconfigurable scan path architecture is presented, which is synthesized based on the test data set. This reconfigurable scan path concept is applicable not only to two-pattern test sets but also when the test program has been generated for stuck-at faults
Keywords :
design for testability; fault location; integrated circuit testing; logic testing; ASIC; connection matrix; delay fault detection; graph matching; reconfigurable scan path architecture; scan path design; stuck-at faults; stuck-open faults; transition shifting; two-pattern tests; Application specific integrated circuits; Circuit faults; Circuit testing; Delay; Fault detection; Microelectronics; Registers; Robustness; Sequential analysis; System testing;
Conference_Titel :
European Test Conference, 1993. Proceedings of ETC 93., Third
Conference_Location :
Rotterdam
Print_ISBN :
0-8186-3360-3
DOI :
10.1109/ETC.1993.246553
