DocumentCode
3378271
Title
A new source-side erase algorithm to reduce disturb problem in flash EPROM
Author
Chen, C. ; Ma, T.P.
Author_Institution
Dept. of Electr. Eng., Yale Univ., New Haven, CT, USA
fYear
1995
fDate
31 May-2 Jun 1995
Firstpage
321
Lastpage
325
Abstract
A two-step erase algorithm for a Flash EPROM, consisting of a source-side erase and a subsequent source-side soft channel hot-electron injection, will be described. The second step is designed to neutralize the GIDL-induced trapped holes during the first step. Experimental results show that the two-step algorithm greatly reduces the word-line disturb problem and achieves threshold voltage convergence
Keywords
EPROM; hole traps; hot carriers; integrated circuit reliability; integrated memory circuits; GIDL-induced trapped holes; flash EPROM; source-side erase; source-side soft channel hot-electron injection; threshold voltage; two-step algorithm; word-line disturb; Charge carrier processes; Charge pumps; Convergence; EPROM; Electron traps; Gate leakage; Leakage current; Microelectronics; Stress; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Technology, Systems, and Applications, 1995. Proceedings of Technical Papers. 1995 International Symposium on
Conference_Location
Taipei
ISSN
1524-766X
Print_ISBN
0-7803-2773-X
Type
conf
DOI
10.1109/VTSA.1995.524712
Filename
524712
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