Title :
High-throughput QR decomposition for MIMO detection in OFDM systems
Author :
Huang, Zheng-Yu ; Tsai, Pei-Yun
Author_Institution :
Dept. of Electr. Eng., Nat. Central Univ., Chungli, Taiwan
fDate :
May 30 2010-June 2 2010
Abstract :
In this paper, we aim to design and implement a high-throughput QR decomposition architecture for 4 × 4 MIMO signal detection problems. A real-value decomposed MIMO system model is handled and thus the channel matrix to be processed is extended to the size 8×8. Instead of direct factorization, we propose a QR decomposition scheme by cascading one complex-value and one real-value Givens rotation blocks, which can save 44% hardware complexity. The systolic array is adopted for hardware implementation to facilitate pipeline design. Then, the requirement of skewed inputs to the conventional complex-value QR-decomposition systolic array is improved and 37% of delay elements are removed. The real-value Givens rotation stage is implemented by a stacked triangular systolic array to match with the throughput of the complex-value one. We have implemented the proposed design in 0.18 μm CMOS technology with 152K gates. From post-layout simulations, the maximum operating frequency can achieve 90.09MHz. The proposed scheme not only reduces the hardware complexity, but also supports high throughput for MIMO-OFDM signal detection up to 2.16 Gbps under stationary channels.
Keywords :
CMOS integrated circuits; MIMO communication; OFDM modulation; communication complexity; matrix algebra; signal detection; systolic arrays; CMOS technology; MIMO signal detection problems; OFDM systems; bit rate 2.16 Gbit/s; channel matrix; complex-value QR-decomposition systolic array; frequency 90.09 MHz; hardware complexity; high-throughput QR decomposition; pipeline design; real-value Givens rotation blocks; real-value decomposed MIMO system model; stacked triangular systolic array; CMOS technology; Hardware; MIMO; Matrix decomposition; OFDM; Pipelines; Signal design; Signal detection; Systolic arrays; Throughput;
Conference_Titel :
Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on
Conference_Location :
Paris
Print_ISBN :
978-1-4244-5308-5
Electronic_ISBN :
978-1-4244-5309-2
DOI :
10.1109/ISCAS.2010.5537358