Title :
Pass-transistor dual value logic for low-power CMOS
Author :
Oklobdzija, Vojin G. ; Duchêne, B.
Author_Institution :
Dept. of Electr. & Comput. Eng., California Univ., Davis, CA, USA
fDate :
31 May-2 Jun 1995
Abstract :
This paper presents new pass-transistor logic termed DVL which contains fewer transistors than its counterpart DPL yet maintaining comparable performance. A method for synthesis of such networks is also developed and demonstrated in this paper. The new logic is characterized by good speed and low power. The simulations and tests were performed using 1-μm CMOS
Keywords :
CMOS logic circuits; logic design; logic gates; 1 micron; DVL logic family; logic IC; low-power CMOS; pass-transistor dual value logic; CMOS logic circuits; Degradation; Delay; Laboratories; Logic gates; MOSFETs; Maintenance engineering; Page description languages; Systems engineering and theory; Transistors;
Conference_Titel :
VLSI Technology, Systems, and Applications, 1995. Proceedings of Technical Papers. 1995 International Symposium on
Conference_Location :
Taipei
Print_ISBN :
0-7803-2773-X
DOI :
10.1109/VTSA.1995.524716
