Non Overlapping Clock generator for switched capacitor circuits in Bio-Medical applications

Switched capacitor circuits have become a popular method for implementing mixed signal blocks in standard CMOS technologies. Non-Overlapping Clock (NOC) generator is a key building block of switched capacitor circuits. Standard NOC circuits use simple inverters to realize delays. For high to moderate frequencies, the number of inverters required is nominal. But for low frequency applications like Bio-Medical Signal Processing, the number of inverters increase drastically affecting the area and power budget. In this work it is proposed to use an inverter in inverted form along with a simple inverter as an inverting circuit to realize significant delay with lesser number of transistors. Simulation results suggest that the proposed inverter is area and power efficient.