Title :
Incoming inspection of FPGA´s
Author :
Jordan, C. ; Marnane, W.P.
Author_Institution :
Sch. of Electron. Eng. & Comput. Sci., Wales Univ., Bangor, UK
Abstract :
A fault free field programmable array (FPGA) is essential for prototyping design. The authors present a test method that will allow a designer to quickly and efficiently test the FPGA so that he can with confidence know that any errors are design errors and are not due to the presence of manufacturing faults in the FPGA. The fault method is based on a divide and conquer approach for testing regular arrays and allows one to generate test vectors with high fault coverage very efficiently
Keywords :
fault location; inspection; logic arrays; logic testing; production testing; FPGA; fault model; field programmable array; incoming inspection; prototyping design; test vectors; Application specific integrated circuits; Circuit faults; Circuit testing; Computer science; Design engineering; Field programmable gate arrays; Inspection; Logic arrays; Prototypes; Pulp manufacturing;
Conference_Titel :
European Test Conference, 1993. Proceedings of ETC 93., Third
Conference_Location :
Rotterdam
Print_ISBN :
0-8186-3360-3
DOI :
10.1109/ETC.1993.246578
