• DocumentCode
    3378675
  • Title

    Removing redundancy in interconnect simulation using domain decomposition techniques

  • Author

    Ambalavanar, V. ; Jerome, A. ; Gunupudi, P.

  • Author_Institution
    Dept. of Electron., Carleton Univ., Ottawa, ON
  • fYear
    2007
  • fDate
    13-16 May 2007
  • Firstpage
    85
  • Lastpage
    88
  • Abstract
    A new, accurate and efficient coupled interconnect simulation algorithm is presented in this paper. This algorithm eliminates redundancies present in simulation of interconnect networks by exploiting the repetitive nature of segments in traditional interconnect discretization methods with the aid of domain decomposition methods. Since the proposed algorithm does not perform any approximations, the numerical accuracy of the original network is not compromised. This algorithm was tested on practical interconnect networks and a considerable speed-up was obtained.
  • Keywords
    circuit simulation; integrated circuit interconnections; integrated circuit modelling; redundancy; circuit simulation; domain decomposition techniques; interconnect simulation; longitudinal partitioning; redundancy elimination; signal integrity; Circuit testing; Computational modeling; Delay effects; Frequency; Inductors; Integrated circuit interconnections; Nonlinear equations; Partitioning algorithms; Vectors; Voltage; Interconnects; circuit simulation; domain decomposition; longitudinal partitioning and signal integrity;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Signal Propagation on Interconnects, 2007. SPI 2007. IEEE Workshop on
  • Conference_Location
    Genova
  • Print_ISBN
    978-1-4244-1223-5
  • Electronic_ISBN
    978-1-4244-1224-2
  • Type

    conf

  • DOI
    10.1109/SPI.2007.4512217
  • Filename
    4512217