Aliasing minimization in signature analysis testing

This paper reconsiders the problem of the design of optimal signature registers for BIST applications. Different strategies should be considered in designing multiple-input and single-input registers. For multiple-input registers, aliasing minimization cannot be the only guiding criterion: it is shown that the performance of a register with regards to aliasing depends strongly on the nature of the circuit under test and on the effects of the fault at its outputs. It is therefore preferable to choose a register that performs satisfactorily regardless of the circuit tested and of the test length chosen, i.e. a maximally reliable register. Registers based on primitive feedback polynomials are identified as the most reliable, in terms of asymptotic as well as transient behavior of the aliasing probability